CISC Y RISC

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Definiciones

CISC
RISC

Pros and Cons

The advantages of CISC
The disadvantages of CISC
The advantages of RISC
The hazards of RISC

Conclusiones

Definitions

CISC (complex instruction set computer)

The term "CISC" (complex instruction set computer or computing) refers to computers designed with a full
set of instructions that were intended to provide needed capabilities in the most efficient way. Later, it was
discovered that, by reducing the full set to only the most frequently used instructions, the computer would
get more work done in a shorter amount of time for most applications. Since this was called reduced
instruction set computing (RISC), there was now a need to have something to call full-set instruction
computers - thus, the term CISC.

The PowerPC mciroprocessor, used in IBM's RISC System/6000 workstation and Macintosh computers, is a RISC
microprocessor. Intel's Pentium microprocessors are CISC microprocessors. RISC takes the longer, more complex instructions
from a CISC design and reduces it to multiple instructions that are shorter and faster to process.

I) http://whatis.com/cisc.htm

RISC (reduced instruction set computer)

A RISC (reduced instruction set computer) is a microprocessor that is designed to perform a smaller
number of types of computer instructions so that it can operate at a higher speed (perform more MIPS, or
millions of instructions per second). Since each instruction type that a computer must perform requires
additional transistors and circuitry, a larger list or set of computer instructions tends to make the
microprocessor more complicated and slower in operation.

John Cocke of IBM Research in Yorktown, New York, originated the RISC concept in 1974 by proving that about 20% of the instructions in a computer did 80% of the work. The first computer to benefit from this discovery was IBM's PC/XT in 1980.
Later, IBM's RISC System/6000, made use of the idea. The term itself (RISC) is credited to David Petersen, a teacher at the
University of California in Berkeley. The concept was used in Sun Microsystems' SPARC microprocessors and led to the
founding of what is now MIPS Technologies, part of Silicon Graphics. DEC's Alpha microchip also uses RISC technology.

The RISC concept has led to a more thoughtful design of the microprocessor. Among design considerations are how well an
instruction can be mapped to the clock speed of the microprocessor (ideally, an instruction can be performed in one clock cycle);how "simple" an architecture is required; and how much work can be done by the microchip itself without resorting to software help.

Besides performance improvement, some advantages of RISC and related design improvements are:

     A new microprocessor can be developed and tested more quickly if one of its aims is to be less complicated.
     Operating system and application programmers who use the microprocessor's instructions will find it easier to develop code
     with a smaller instruction set.
     The simplicity of RISC allows more freedom to choose how to use the space on a microprocessor.
     Higher-level language compilers produce more efficient code than formerly because they have always tended to use the
     smaller set of instructions to be found in a RISC computer.

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Processor Architectures - RISC vs CISC

CISC - complex instruction set computer. CISC processors have a large vocabulary of instructions, but cannot
perform any of these instructions particularly fast. Intel's x86 architecture is based upon CISC, however Intel has tried
to adopt elements of RISC into it's Pentium line of processors, combining the best aspects of both architectures.

RISC - reduced instruction set computer. RISC processors have a more limited instruction set than CISC processors,
but are able to perform instructions at a faster speed. RISC processor architectures are being adopted by most
workstation manufacturers, as RISC processors are simpler, faster and cheaper than their CISC counterparts. The
main disadvantage of RISC processors is that they are not able to directly support older software; an emulator is
required to translate CISC instructions into RISC, losing the speed advantage of RISC.

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CISC Pros and Cons

The advantages of CISC

At the time of their initial development, CISC machines used available technologies to optimize computer performance.

     Microprogramming is as easy as assembly language to implement, and much less expensive than hardwiring a
     control unit.
      The ease of microcoding new instructions allowed designers to make CISC machines upwardly compatible: a new
     computer could run the same programs as earlier computers because the new computer would contain a superset of the
     instructions of the earlier computers.
     As each instruction became more capable, fewer instructions could be used to implement a given task. This made more
     efficient use of the relatively slow main memory.
     Because microprogram instruction sets can be written to match the constructs of high-level languages, the compiler does
     not have to be as complicated.

The disadvantages of CISC

Still, designers soon realized that the CISC philosophy had its own problems, including:

     Earlier generations of a processor family generally were contained as a subset in every new version --- so instruction set
     & chip hardware become more complex with each generation of computers.
     So that as many instructions as possible could be stored in memory with the least possible wasted space, individual
     instructions could be of almost any length---this means that different instructions will take different amounts of clock
     time to execute, slowing down the overall performance of the machine.
     Many specialized instructions aren't used frequently enough to justify their existence --- approximately 20% of the
     available instructions are used in a typical program.
     CISC instructions typically set the condition codes as a side effect of the instruction. Not only does setting the
     condition codes take time, but programmers have to remember to examine the condition code bits before a subsequent
     instruction changes them.

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RISC Pros and Cons

The advantages of RISC

Implementing a processor with a simplified instruction set design provides several advantages over implementing a comparable CISC design:

Speed. Since a simplified instruction set allows for a pipelined, superscalar design RISC processors often achieve 2 to 4 times the performance of CISC processors using comparable semiconductor technology and the same clock rates.
Simpler hardware. Because the instruction set of a RISC processor is so simple, it uses up much less chip space; extra functions, such as memory management units or floating point arithmetic units, can also be placed on the same chip. Smaller chips allow a semconductor manufacturer to place more parts on a single silicon wafer, which can lower the per-chip cost dramatically.
Shorter design cycle. Since RISC processors are simpler than corresponding CISC processors, they can be designed more quickly, and can take advantage of other technological developments sooner than corresponding CISC designs, leading to greater leaps in performance between generations.

The hazards of RISC

The transition from a CISC design strategy to a RISC design strategy isn't without its problems. Software engineers should be aware of the key issues which arise when moving code from a CISC processor to a RISC processor.

Code Quality

The performance of a RISC processor depends greatly on the code that it is executing. If the programmer (or compiler) does a poor job of instruction scheduling, the processor can spend quite a bit of time stalling: waiting for the result of one instruction before it can proceed with a subsequent instruction.

Since the scheduling rules can be complicated, most programmers use a high level language (such as C or C++) and leave the instruction scheduling to the compiler.

This makes the performance of a RISC application depend critically on the quality of the code generated by the compiler. Therefore, developers (and development tool suppliers such as Apple) have to choose their compiler carefully based on the quality of the generated code.

Debugging

Unfortunately, instruction scheduling can make debugging difficult. If scheduling (and other optimizations) are turned off, the machine-language instructions show a clear connection with their corresponding lines of source. However, once instruction scheduling is turned on, the machine language instructions for one line of source may appear in the middle of the instructions for another line of source code.

Such an intermingling of machine language instructions not only makes the code hard to read, it can also defeat the purpose of using a source-level compiler, since single lines of code can no longer be executed by themselves.

Therefore, many RISC programmers debug their code in an un-optimized, un-scheduled form and then turn on the scheduler (and other optimizations) and hope that the program continues to work in the same way.

Code expansion

Since CISC machines perform complex actions with a single instruction, where RISC machines may require multiple instructions for the same action, code expansion can be a problem.

Code expansion refers to the increase in size that you get when you take a program that had been compiled for a CISC machine and re-compile it for a RISC machine. The exact expansion depends primarily on the quality of the compiler and the nature of the machine's instruction set.

Fortunately for us, the code expansion between a 68K processor used in the non-PowerPC Macintoshes and the PowerPC seems to be only 30-50% on the average, although size-optimized PowerPC code can be the same size (or smaller) than corresponding 68K code.

System Design

Another problem that faces RISC machines is that they require very fast memory systems to feed them instructions. RISC-based systems typically contain large memory caches, usually on the chip itself. This is known as a first-level cache.

Apple's first PowerPC-based machines can contain an optional second-level cache external to the PowerPC chip. This card supplements the cache built into the processor which increases overall system performance.

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Conclusión

The next 2 chapters, CISC and RISC, examine the factors which led to CISC becoming the predominant design philodophy of the 70's and 80's, and how a reexamination of these factors led to the emergence of RISC:

As we have seen, Reduced Instruction Set Computing (RISC) is an evolution in computer architectures that emphasizes speed and cost-effectiveness over ease of assembly-language programming and the conservation of memory. In addition, RISC-based designs will continue to grow in speed and ability much more rapidly than comparable CISC designs over the next several years.

These factors make RISC an irresistible choice for the future of the Macintosh product line. Yet, since Apple's customers have a sizable investment in hardware and software, compatibility is a key word among Apple's PowerPC engineers. This compatibility is being maintained through software emulation, significant amounts of compatibility testing, and making sure that existing NuBus cards can work in the first PowerPC machines.